falloutcollective.com

James N. Sears

400 N. 4th St. #817
St. Louis MO 63102
nick_sears@sbcglobal.net

High Power Audio Bass Amplifier

University of Illinois Urbana-Champaign ECE 345 (now ECE 445)
Instructors Award Winner Spring 2002

In the spring semester of 2002, Steve Lapen, Nithin Cherian and I developed a switchmode bass guitar amplifier to investigate the implementation of a high power, high efficiency low frequency audio amplifier. I was primarily responsible for the PWM conversion stage of the amplifier, along with playing a very active role in integration, debugging, and testing.

In the oscilloscope plot to the right the output current at an amplitude of 22.6 A(p-p) into a 2.2 Ohm load for an output power of 140W RMS / 280W peak is shown as the top trace, while the high-side gate drive signal is shown in the bottom trace (notice the noise from the switching currents in the power FETs corrupting the gate drive signals - this is the limiting factor of high power operation).

The abstract below is excerpted from our final project documentation, available online in its entirety at https://courses.ece.uiuc.edu/ece445/cgi-bin/view_project.pl?spring2002_2 (link opens in new browser window).

 

HIGH POWER AUDIO BASS AMPLIFIER
GROUP 2:
NITHIN CHERIAN
STEVE LAPEN
NICK SEARS

TA: DAVE CROWE
APRIL 30, 2002
PROJECT#: 2

ECE 345 — SENIOR DESIGN LABORATORY
UNIVERSITY OF ILLINOIS URBANA-CHAMPAIGN

ABSTRACT

The most common audio amplifiers available today use biased power transistors to amplify the audio signal. Maintaining this bias wastes a large amount of power, and efficiency is typically below fifty percent at normal listening volume, introducing the need for heavy heat sinks and noisy cooling fans. The goal of this project was to build a more efficient bass amp by using switching power processing techniques which eliminate the need for biasing in the amplifier circuit. This technology is relatively new in the audio realm because of the comparatively recent arrival of high-power semiconductor devices fast enough to accommodate the switching requirements.

The topology of the circuit created in this project includes a linear preamplifier and equalizer, an analog-to-digital signal processing section, an isolation subcircuit, a half-bridge switching section, and an output filter. The switching scheme is open-loop pulse-width modulation. The final implementation is capable of driving 280 W of peak power (140 W time-average) into a 2 Ohm load with flat gain (+/- 3dB) from 20 Hz to 5 kHz. The limiting factor in power output is disruption of the digital gate-drive signals by switching noise. Preliminary efficiency measurements are above 40% for output power from 30 W to 280 W peak. It is expected that efficiency and power output will both be improved significantly if noise-induced gate drive disruption can be remedied.